What are the parallel port registers?

The new architecture was built around a computing model called Explicitly Parallel Instruction Computing (EPIC). EPIC was designed to increase the ability of microprocessors to execute software instructions in parallel by using the software compiler—rather than complex logic circuits on the processor itself—to identify and leverage opportunities for parallel execution. With this approach, Intel and HP hoped to drive performance gains by increasing the amount of work that could be accomplished during each processor clock cycle.